BMC Firmware Engineer

What MatX Is Building MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. MatX is seeking System Software Engineer to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. The MatX host system software team owns everything that makes our AI silicon and systems usable: from Linux kernel drivers up through node and cluster management. The team also co-owns the BMC/OpenBMC firmware stack, with dedicated firmware engineers, so host software and out-of-band management are designed together rather than bolted together. We're looking for self-driven engineers who can take a hardware spec and a register map and just start building — prototype drivers, low-level utilities that talk directly to the chip, daemons, and tooling — with minimal hand-holding. Each engineer on this team has a primary focus area, but ownership of overlapping components is shared, and you should expect (and want) to venture across the stack. Our BMC firmware stack, built on OpenBMC, is the nervous system of our platform: it handles bring-up, telemetry, thermal and power management, firmware updates, and platform security for every board we ship. We are seeking a senior BMC firmware engineer to own the OpenBMC stack for our AI compute boards, from first board bring-up through high-volume datacenter deployment. You will be one of the first engineers on this effort, with broad ownership and direct influence on both firmware architecture and board design. What You'll Do Here Design, build, and ship OpenBMC firmware for our custom compute boards, where the BMC manages our in-house AI ASICs — from early bring-up on reference hardware through production deployment Own the Yocto/OpenEmbedded-based build, board port, and device trees (U-Boot and Linux kernel) for our BMC SoC Develop platform manageability features: sensor and telemetry infrastructure, inventory, event logging, fan/thermal/power management (PMBus), and RAS for the AI ASICs and board components (CPLDs/FPGAs, PSUs, NICs, memory) Build management interfaces on industry standards — Redfish, IPMI, and DMTF protocols (MCTP, PLDM, SPDM) — including out-of-band management of our ASICs Implement firmware update, secure boot, and attestation flows in partnership with our silicon and security teams Write and bring up Linux kernel drivers and D-Bus/sdbusplus services; debug across the hardware/firmware boundary with schematics, logic analyzers, and JTAG Influence board and ASIC design: review schematics and hardware architecture from a manageability and debuggability perspective Upstream improvements to the OpenBMC community where appropriate, and build the CI, test automation, and tooling that keep our firmware quality high Who You Are 8+ years of experience in BMC firmware and embedded Linux development, with hands-on OpenBMC experience from board bring-up through production Strong C/C++ and solid Python or Bash; deep Linux fundamentals spanning user space, the driver model, and kernel internals Proficient with Yocto/OpenEmbedded, U-Boot, and device trees; experience with BMC SoCs such as ASPEED or Nuvoton Board bring-up experience with low-level buses and interfaces: I2C/I3C, SPI, eSPI/LPC, SMBus, UART, PCIe, JTAG Working knowledge of platform management standards: IPMI/KCS, Redfish, and DMTF protocols (MCTP, PLDM, SPDM) Experience with thermal/power management, firmware update mechanisms, and firmware security (secure boot, root of trust, attestation) is a strong plus Contributions to OpenBMC, the Linux kernel, or related open-source/OCP/DMTF efforts are a plus Comfortable operating with high autonomy on a small team, collaborating closely with hardware, silicon, security, and systems engineers Excellent technical communication and documentation skills Bonus Points If You Have Experience with pre-silicon validation environments (simulation, emulation, FPGA prototyping) First-silicon or new-platform bring-up experience for accelerators, NICs, or SoCs Familiarity with SR-IOV, dma-buf, peer-to-peer PCIe, or VFIO Kernel performance tuning and profiling experience (perf, ftrace, eBPF) Exposure to BMC/host interaction paths (e.g., in-band vs. out-of-band device access, sideband interfaces such as I2C/SMBus) Rust for systems programming Compensation The US base salary for this full-time position is determined based on a variety of factors including role, experience, location, job related skills, and relevant education and training. Career length is only a guideline for compensation. Early Career - $120,000 - $250,000 + equity Mid Career - $175,000 - $362,500 + equity Senior C