Forward Deployed Engineer, Korea
full-time
mid
Posted 2 days ago
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About this role
ABOUT NORMAL COMPUTING
Normal Computing builds silicon that turns thermal noise from an obstacle into a computational resource. Conventional chips spend most of their energy forcing determinism onto physics; ours compute with it. Stochastic, in-memory, asynchronous: the result is 10-100× more AI inference per dollar, per watt.
We co-design the full stack: AI-native EDA systems in production with the world's largest semiconductor companies, and the advanced ASICs they make possible. Backed by $85M+ from the world's leading deep-tech investors and built by scientists, engineers, and operators from the labs that built modern computing.
Normal works as one team across New York, Silicon Valley, London, Copenhagen, and Seoul. We hire people who want the hardest version of their craft, across every discipline, at every seniority.
THE ROLE
The cost of taping out silicon is enormous, and the complexity of verification makes multiple tapeouts hard to avoid. Normal EDA accelerates this work as an AI platform for collaborative silicon engineering: a single source of truth across the silicon engineering lifecycle, learning continuously from the teams that use it.
As a Forward Deployed Engineer in Korea, you own our EDA system inside the environment of one of the world's largest memory semiconductor companies, embedded on-site with their design teams in Korea for an initial twelve-month deployment. You adapt our platform to their data, workflows, and design challenges across multiple business units, working alongside our account executive and a deployment strategist to make the deployment a success. This is FDE work at its most research-intensive: cutting-edge models, significant resources, and a customer environment few engineers ever get access to. For engineers with strong AI backgrounds, it is a rare entry point into hardware at the deepest level.
You thrive as a problem-solver and take pride in winning over customers along with the rest of your team. You will be debugging distributed systems, post-training models, and working in SystemVerilog, because that is the language of our customers.
WHAT YOU'LL OWN
- Production Problem-Solving: Diagnose issues in our system, the model, the data, or the workflow. Work deep in both Normal's systems and the customer's environment to resolve them, and close the loop with their engineers.
- Evaluation Against Reality: Design and run evals against real customer workflows, validating generated artifacts against their specifications so model behavior holds up in production.
- Platform Integration: Integrate the platform with each business unit's data, design flows, and tooling, working with their production codebases and against their existing infrastructure.
- Customer Signal: Embed with silicon design teams, translate their constraints into model and platform requirements, and carry that signal back to Normal's research, product, and platform teams to shape what gets built next.
- Continual Learning: Post-train Normal's models on the customer's proprietary data and trajectories, and build the continual-learning loops that turn their engineers' feedback into system knowledge, so model quality compounds across the engagement.
- Judgment Ahead of Playbook: Make the calls on what to build, what to skip, and when to push back on a request that would compromise what ships. Codify what works into patterns that raise the floor for every engagement after yours.
WHAT MAKES YOU A GREAT FIT
- Willing and able to work on-site in Korea for the duration of the deployment. This is an explicit requirement of the role
- Deep hardware experience paired with recent, hands-on AI experience. We weight this combination above pure ML depth or prior FDE experience in any domain
- Great at problem-solving and tracking down issues wherever they are in the stack
- Strong software engineering fundamentals: proficient in Python, comfortable in production codebases, distributed-systems literate
- Hands-on experience with the modern ML stack: prompt engineering, fine-tuning, evals, RAG, agentic patterns, model deployment
- Willingness and ability to go deep on semiconductor design and verification workflows, including memory. You will spend significant time inside UVM testbenches, SystemVerilog codebases, and design specifications. Prior experience is a strong advantage, but what matters is whether you can build fluency fast and earn credibility with the customer's engineers
- An ability to ship ML systems inside customer or production environments where model behavior had to hold up against real-world data
- Calm in ambiguity: you make good decisions with incomplete information, and you know when to act and when to ask
- Comfortable with travel when needed
BONUS POINTS
- Professional fluency in Korean and experience working within Korean engineering organizations (strongly preferred)
- Direct experience with memory (DRAM, NAND/SSD) design or ve
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